Creating and sharing knowledge for telecommunications
... Óscar Almeida Ferraz

PhD Student

Óscar Ferraz

Academic position: PhD Student
Joining date: 01-09-2018
Roles in IT: PhD Student
Thematic Line: Information and Data Sciences
Group: Multimedia Signal Processing – Co

Email: Send Email
Address: IT – Coimbra
Department of Electrical and Computer Engineering
University of Coimbra - Pole II
P-3030-290 COIMBRA
Tel: +351 239 796 236
Fax: +351 239 796 293


Scientific Achievements

  • MSc, Universidade de Coimbra, 01-09-2019
  • Licenciatura, Universidade de Coimbra, 01-09-2017
  • GPUs
  • High-performance computing
  • Non-binary LDPC codes
  • Towards Processing Near-Memory in Non-Binary Low-Density Parity Check Decoders, Universidade de Coimbra, PhD Student, Óscar Almeida Ferraz, Supervisor: G. Falcão, Co-supervisor: V. Silva, jan-2021 - dez-2025
  • S. Subramaniyan, Ó. Ferraz, M. Ashuthosh, S. Krishna, G. W. Wang, J. R. C. Cavallaro, V. Silva, G. Falcão, M. P. Purnaprajna, Enabling High-Level Design Strategies for High-Throughput and Low-power NB-LDPC Decoders, IEEE Design and Test, Vol. 40, No. 1, pp. 85 - 95, August, 2022 | Full text (PDF 1 MB) | BibTex
  • Ó. Ferraz, S. Subramaniyan, R. Chinthalaa,, J. Andrade, J. R. C. Cavallaro, S. Nandy, V. Silva, X. Zhang, M. P. Purnaprajna, G. Falcão, A Survey on High-Throughput Non-Binary LDPC Decoders: ASIC, FPGA and GPU Architectures, IEEE Communications Surveys & Tutorials, Vol. 1, No. 1, pp. 1 - 33, November, 2021 | Full text (PDF 8 MBs) | BibTex
  • Ó. Ferraz, V. Silva, G. Falcão, Hyperspectral Parallel Image Compression on Edge GPUs, Remote Sensing, Vol. 13, No. 6, pp. 1077 - 1077, March, 2021 | BibTex
  • Ó. Ferraz, G. Falcão, V. Silva, Gbit/s throughput under 6.3W lossless hyperspectral image compression on parallel embedded devices, IEEE Embedded Systems Letters, Vol. 1, No. 1, pp. 1 - 1, April, 2020 | BibTex
  • Ó. Ferraz, G. Falcão, V. Silva, In-Memory Bit Flipping LDPC Decoding, European Signal Processing Conference EUSIPCO, Lyon, France, Vol., pp. -, August, 2024,
    | Abstract
    | BibTex
  • Ó. Ferraz, Y. Falevoz, V. Silva, G. Falcão, Unlocking the Potential of LDPC Decoders with PiM Acceleration, Asilomar Conference on Signals, Systems, and Computers, Monterey, CA, United States, October, 2023 | BibTex
  • Ó. Ferraz, H. Araujo, V. Silva, G. Falcão, Benchmarking Convolutional Neural Network Inference on Low-Power Edge Devices, IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Rhodes, Greece, Vol., pp. 1 - 5, June, 2023 | BibTex
  • Ó. Ferraz, P. Menezes, V. Silva, G. Falcão, Benchmarking Vulkan vs OpenGL Rendering on Low-Power Edge GPUs, International Conference on Graphics and Interaction ICGI, Porto, Portugal, Vol., pp. 1 - 8, November, 2021 | BibTex
  • Ó. Ferraz, V. Silva, G. Falcão, On the Performance of Link Space Communications using NB-LDPC Codes on Embedded Parallel Systems, Asilomar Conference on Signals, Systems, and Computers, Pacific Groove, Califonia, United States, Vol., pp. 1164 - 1168, November, 2021 | BibTex
  • S. Subramaniyan, Ó. Ferraz, M. Ashuthosh, S. Krishna, G. W. Wang, J. R. C. Cavallaro, V. Silva, G. Falcão, M. P. Purnaprajna, Pushing the Limits of Energy Efficiency for Non-Binary LDPC Decoders on GPUs and FPGAs, IEEE International Workshop on Signal Processing Systems - SiPS, Coimbra, Portugal, Vol., pp. 1 - 6, October, 2020,
    | Abstract
    | BibTex
  • Ó. Ferraz, S. Subramaniyan, G. W. Wang, J. R. C. Cavallaro, G. Falcão, M. P. Purnaprajna, Gbit/s Non-Binary LDPC Decoders: High-Throughput using High-Level Specifications, IEEE International Symp. on Field-Programmable Custom Computing Machines - FCCM, Fayetteville, Arkansas, United States, Vol., pp. 226 - 226, May, 2020 | BibTex
  • Ó. Ferraz, G. Falcão, V. Silva, 1.5GBIT/S 4.9W HYPERSPECTRAL IMAGE ENCODERS ON A LOW-POWER PARALLEL HETEROGENEOUS PROCESSING PLATFORM, IEEE International Conf. on Acoustics, Speech, and Signal Processing - ICASSP, Barcelona, Spain, Vol., pp. 1693 - 1697, May, 2020 | BibTex

Closed Projects3

Acronym Name Funding Agency Start date Ending date
Bin-NET Bin-NET: PiM-Enabled Binary Neural Network Inferencing at the Edge FCT 01-12-2021 31-05-2023
ECHO ECHO: error-correcting codes in high-performance communication systems through joint exploration of inference algorithms and parallel architectures FCT 01-07-2017 31-12-2023
HAnDLE Hardware Accelerated Deep Learning Framework FCT 12-07-2018 11-07-2021

Activities from this researcher fall under the following United Nations Strategic Development Goals (SDGs):