Hyperspectral Compressive Sensing with a System-On-Chip FPGA
; Véstias, M.
; Martin, G. Martin
IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing Vol. 13, Nº -, pp. 3701 - 3710, July, 2020.
ISSN (print): 1939-1404
Scimago Journal Ranking: 1,51 (in 2018)
Digital Object Identifier: 10.1109/JSTARS.2020.2996679
Advances in hyperspectral sensors have led to a significantly increased capability for high-quality data. This trend calls for the development of new techniques to enhance the way that such unprecedented volumes of data are stored, processed, and transmitted to the ground station.
An important approach to deal with massive volumes of information is an emerging
technique, called compressive sensing,
which acquire directly the compressed
signal instead of acquiring the full data set.
Thus reducing the amount of data that
needs to be measured, transmitted and
stored in first place.
In this paper, a hardware/software implementation in a system-on-chip Field-Programmable Gate Array (FPGA) for compressive sensing is proposed. The proposed hardware/software architecture runs the compressive sensing algorithm with a unitary compression rate over an Airborne Visible/Infrared Imaging Spectrometer (AVIRIS) sensor image with 512 lines, 614 samples, 224 bands in 0.35 seconds. The proposed system runs 49x and 216x faster than an embedded 256-cores GPU of a Jetson TX2 board and the ARM of the system-on-chip FPGA, respectively. In terms of energy, the proposed architecture requires around 100x less energy.