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Basic Sciences and Enabling Technologies
Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
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Basic Sciences and Enabling Technologies
DEFENDED PHD THESIS
Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
Nuno Calado Correia Lourenço
Supervisors:
Nuno Cavaco Gomes Horta
University:
Instituto Superior Técnico
Defense date:
12 / 2014
Keywords:
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