Toggle navigation
Contact us
Intranet login
About IT
Overview
Organization
History
Sites
Support Staff
Funding
Quality Policy
Code of Conduct
Gender Equality
Privacy Policy
Key IT indicators
Annual Reports
Alumni
Press Kit
IT Sites
IT Aveiro
IT Coimbra
IT Lisboa
IT Branch - Covilhã
IT Branch - ISCTE-IUL
IT Branch - Leiria
IT Branch - Porto
Thematic Lines
Wireless Technologies
Optics and Photonics
Information and Data Sciences
Networks & Services
Basic Sciences & Enabling Technologies
Positions
Why work with us at IT
Post-doc positions
Other research positions
News & Events
News
Coming Events
Past Events
Short Courses
Newsletters
Search!
Creating and sharing knowledge for telecommunications
Home
Thematic Lines
Wireless Technologies
FPGA-based Implementation of an ASK/FSK Detector for Railway Signalling Balises
Close
It appears your web browser doesn't support iframes.
Wireless Technologies
CONCLUDED MSC THESIS
FPGA-based Implementation of an ASK/FSK Detector for Railway Signalling Balises
Marcelo Marques
Supervisors:
Arnaldo da Silva Rodrigues de Oliveira
University:
Universidade de Aveiro
Keywords:
Abstract:
PDF download
© 2022, IT - Instituto de Telecomunicações | All Rights Reserved