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A design methodology for integrated inductor-based DC–DC converters

Costa, V. ; Santos, P. M. ; Borges, B.

Microelectronics Journal Vol. 43, Nº 6, pp. 401 - 409, June, 2012.

ISSN (print): 0959-8324
ISSN (online):

Journal Impact Factor: 0,859 (in 2008)

Digital Object Identifier: 10.1016/j.mejo.2012.02.007

Abstract
A design methodology for monolithic integration of inductor based DC–DC converters is proposed in
this paper. A power loss model of the power stage, including the drivecircuits,is defined in order to
optimize efficiency. Based on this model and taking as reference a 0.35 um CMOS process, a buck
converter was designed and fabricated.For a given set of operating conditions the defined power loss
model allows to optimize the design parameters for the power stage, including the gate-driver tapering
factor and the width of the power MOSFETs. Experimental results obtained from a buck converter at 100 MHz switching frequency a represented to validate the proposed methodology.