In the past few decades, the problem of automating the sizing task of analog integrated circuit (IC) design has been a popular topic of research in the electronic design automation community. Traditionally, metaheuristics and optimization-based approaches have been explored to address this challenge, but each method has its own drawbacks and/or yield inefficient results’ production. Alternatively, recent advances in machine learning have also brought new perspectives at solving this particular problem. Particularly, artificial neural networks have been used in some works, but there is the common hurdle of small sizing datasets available to train the models in a supervised manner, and the fact that these models lack the ability to generalize beyond/outside their training data, as well as their tendency to fall into mode collapse. Therefore, to overcome these issues, in this paper, the focus is given on using denoising diffusion probabilistic models (DDPMs), a category of state-of-the-art diffusion models, to tackle the inverse problem of analog IC sizing. These models are trained to automatically determine the sizing of an analog IC when given only the set of constraints for its performance metrics. Several DDPM architectures are trained to gradually learn to remove noise, meaning that after training, they can produce new data from random noise samples. While previous work has shown that even a simple DDPM can sample promising sizing solutions in a small amount of time, this work takes one step further by employing a transformer architecture as the backbone of the model, learning a velocity equation of how the data changes between the noise addition steps. 100 sampled points are generated under 1 s, while revealing improved functional performance over other points generated by state-of-the-art approaches. These points can then be utilized as a starting point for further simulation-based optimizations until non-dominated optimal solutions are found. The use of these starting points saves, in some cases, more than 20,000 simulations when compared with randomized starting points, proving the model and pipeline’s efficiency. This work presents the first extensive study in the literature on the use of diffusion models to tackle the inverse problem of analog IC sizing, targeting multiple circuit topologies and integration technologies.