This work describes a fully automated design methodology applied to the design of millimeter-wave (mm-Wave) low-noise amplifiers (LNAs) in a 65-nm CMOS technology. The proposed approach is the first fully automated design methodology to consider an mm-Wave circuit with fully automatic sizing and layout synthesis with prototype measurement. Two LNAs were fabricated and experimentally characterized. LNA1 prototype, targeted for low power consumption, dissipates 2.26 mW @ VDD = 0.6 V to achieve a 3-dB S21 bandwidth (BW) of 8.4 GHz (from 22.3 to 30.7 GHz), a noise figure (NF) of 3.8 dB at 28 GHz, a peak gain of 10 dB, and an input 1-dB compression point (IP1 dB) of -8.7 dBm. LNA2 prototype, targeted for lower NF and higher gain, presents a consumption of 4.8 mW @ VDD = 0.6 V, achieving a BW of 7.3 GHz (from 22.3 to 29.6 GHz), an NF at 28 GHz of 3.47 dB, a peak gain 13.9 dB, and an IP1 dB of -11.74 dBm. Using such a design methodology, it was possible to achieve performance improvements of more than 50% in power consumption and figure of merit (FOM) when compared to recent works.