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Analysis and Design of Current Mode Class-D Power Amplifiers With Finite Feeding Inductors

Pereira, M. ; Assunção, M. ; Vaz, J.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Vol. 1, Nº 1, pp. 1 - 10, February, 2020.

ISSN (print): 1063-8210
ISSN (online):

Journal Impact Factor: (in )

Digital Object Identifier: 10.1109/TVLSI.2020.2971955

Abstract
Current-mode class-D (CMCD) power amplifiers (PAs) may not achieve a switching efficiency as good as class-E PAs, but they require fewer inductances and deliver almost five times more power for the same load and supply voltage when compared with the ideal push-pull class-E PA. Furthermore, CMCD PAs can easily use bondwires as the only circuit inductors, a precious feature that Internet-of-Things (IoT) wireless interfaces can exploit. For this reason, we analyze the voltage and current waveforms in CMCD PAs without assuming infinite value feeding inductors (i.e., without choke inductors). It is shown that the current stress on the switching device is significantly higher than in the conventional topology, especially in bondwire-based designs where relatively small feeding inductances are presented. Finally, we propose a design procedure for a given feeding inductance that maximizes energy efficiency while delivering a compact-size solution. A 2.4-GHz PA capable of delivering 19.8 dBm to a 100-Ω differential load with a power-added-efficiency (PAE) of 58% is presented. Three-dimensional electromagnetic (3-D EM) simulations combined with postlayout simulations were used to evaluate the PA performance in a quad-flat nonlead (QFN)-type package. The circuit is designed in a 0.13-μ m process and only occupies a silicon area of 0.025 mm².