A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications
Póvoa , R. P.
Martins, R. M.
; Goes, JG
IEEE Transactions on Circuits and Systems II: Express Briefs Vol. 1, Nº 1, pp. 1 - 5, April, 2019.
ISSN (print): 1558-3791
ISSN (online): 1549-7747
Scimago Journal Ranking: 0,93 (in 2019)
Digital Object Identifier: 10.1109/TCSII.2019.2913083
The topic of this brief is a single-stage amplifier biased by a doublet of voltage-combiners in a folded configuration, in order to be supplied by a power source of 1.2 V, maintaining proper DC biasing and avoiding the need of any device stacking. The topology has been automatically designed, optimized and laid out, from sizing to layout level, using a layout-aware approach provided by the AIDA framework, a state-of-the-art analog IC design optimization framework. Experimental results prove that a gain of approximately 44 dB, together with a figure-of-merit higher than 1300 MHz×pF/mW are achievable using the proposed topology, with standard UMC 130 nm technology devices and a 1.2 V supply source. Finally, an extension to supply sources below nominal is explored, showing exciting results towards a future of high energy-efficiency amplifiers.