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Software-based high-level synthesis design of FPGA beamformers for synthetic aperture imaging

Amaro, J. ; Yiu, B. Y. Y. ; Falcão, G. ; Gomes, M. ; Yu, A. C. Y.

IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control Vol. 62, Nº 5, pp. 862 - 870, May, 2015.

ISSN (print): 0885-3010
ISSN (online):

Scimago Journal Ranking: 0,81 (in 2015)

Digital Object Identifier: 10.1109/TUFFC.2014.006938

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Field-programmable gate arrays (FPGAs) can potentially be configured as beamforming platforms for ultrasound imaging, but a long design time and skilled expertise in hardware programming are typically required. In this article, we present a novel approach to the efficient design of FPGA beamformers for synthetic aperture (SA) imaging via the use of software-based high-level synthesis techniques. Software kernels (coded in OpenCL) were first developed to stage-wise handle SA beamforming operations, and their corresponding FPGA logic circuitry was emulated through a high-level synthesis framework. After design space analysis, the fine-tuned OpenCL kernels were compiled into register transfer level descriptions to configure an FPGA as a beamformer module. The processing performance of this beamformer was assessed through a series of offline emulation experiments that sought to derive beamformed images from SA channel-domain raw data (40-MHz sampling rate, 12 bit resolution). With 128 channels, our FPGA-based SA beamformer can achieve 41 frames per second (fps) processing throughput (3.44 × 10^8 pixels per second for frame size of 256 × 256 pixels) at 31.5 W power consumption (1.30 fps/W power efficiency). It utilized 86.9% of the FPGA fabric and operated at a 196.5 MHz clock frequency (after optimization). Based on these findings, we anticipate that FPGA and high-level synthesis can together foster rapid prototyping of real-time ultrasound processor modules at low power consumption budgets.