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A Low Power 1.8V/5GHz Monolithic Low-Noise Amplifier

Azevedo, F. ; Mendes, L. ; Vaz, J. ; Fortes, F. ; Rosário, M.

A Low Power 1.8V/5GHz Monolithic Low-Noise Amplifier, Proc Jornadas de Engenharia de Electrónica e Telecomunicações e de Computadores do ISEL, Lisbon, Portugal, Vol. na, pp. na - na, November, 2008.

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This paper presents the design and simulation of a CMOS fully integrated 5GHz low-noise (LNA) amplifier for WLAN applications. The circuit was implemented in a 0.18ƒÝm CMOS standard CMOS process. The simulations, optimized to noise performance, gain and input/output matching, were performed with BSIM3 model. The designed LNA requires 1.8V supply voltage and consumes 14mW. At 5GHz, the circuit has noise figure of 3.4dB, presents 19dB power gain, input return loss of -18dB, output return loss of -16dB, 1.2dBm output referred 1dB compression point, 9dBm output referred IP3 and 50ƒÇ input and output match.