Analog integrated circuit layout and its countless issues have challenged all automation attempts, and one limitative factor must be addressed to finally push automation tools into industrial environment: accurate assessment of post-layout performance degradation. This paper presents PONDEROUS, a performance-driven placement generator highly integrated with off-the-shelf tools, that promotes an exhaustive simulation-based synthesis. However, an alternative operation mode is proposed to bypass the time-consuming extractions and simulations, where a highly accurate machine learning pipeline estimates the impact of the floorplan changes in the post-layout performances. Experimental results show that a set of decision trees operating on highly compressed design space via principal component analysis allow to speed-up synthesis more than 20×, from about 12 hours to 36 minutes.