Quantum key distribution (QKD) provides a secure and effective way of exchanging cryptographic symmetric keys without the possibility of an eavesdropper being undetected. The transmission and detection of the quantum states at the physical layer is the first step to defining a common source of entropy, where both parties will extract a raw key. Over the last few years, continuous variable quantum key distribution (CV-QKD) protocols have become an attractive technology for QKD, providing a low-cost solution that can be easily integrated with the current optical network devices and infrastructure. Unlike other QKD technologies, a CV protocol requires complex and highly computationally demanding digital signal processing (DSP) operations. In that sense, parallel computation tools such as field programmable gate arrays (FPGAs) represent a key element for the practical implementation of this quantum technology and to scale its performance in terms of distance and secret key rate indicators. This work presents an FPGA-based implementation of the physical layer of a CV-QKD transmitter. The proposed architecture and employed protocols are described, and hardware implementation aspects are discussed, including resource occupation analysis, configuration parameters, and timing issues.