Deep learning (DL) models are now a reality towards the automation of the placement task of analog integrated circuit (IC) layout design, promising to bypass the limitations of existing approaches. However, as the complexity of analog design cases tackled by these methodologies increases, a broader set of topological constraints must be supported to cover different layout styles and circuit classes. Here, model-independent differentiable encodings for regularity, boundary, and symmetry island (SI) constraints are described, and an unsupervised loss function is used for the artificial neural network (ANN) model to learn how to generate placements that follow them. As only sizing data is required for its training, it discards the need to acquire legacy layouts containing insights of these types of constraints. The model is ultimately used to produce floorplans from scratch, at push-button speed, for state-of-the-art analog structures, including technology nodes not used for its training.