Layout-Aware Challenges and a Solution for the Automatic Synthesis of Radio-Frequency IC Blocks
Martins, R. M.
; Lourenço, N.
;
Póvoa , R. P.
; Canelas, A.
;
Horta, N.
;
Passos, F.
; Castro-López, R.
; Roca, E.
; Fernández, F.
Layout-Aware Challenges and a Solution for the Automatic Synthesis of Radio-Frequency IC Blocks, Proc International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Taormina, Italy, Vol. , pp. - , June, 2017.
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Abstract
In this paper, the major methodologies proposed in the last years to speed-up the synthesis of radio-frequency integrated circuits blocks are overviewed. The challenges to automate this task are discussed, and, to avoid non-systematic iterations between circuit and layout design steps, the architecture of an innovative solution is proposed. The proposed tool exploits the full capabilities of most established computer-aided design tools available nowadays, i.e., off-the-shelf circuit simulator, electromagnetic simulator and layout extractor. The approach intends to bypass the two major bottlenecks of RF-design: the design of reliable integrated inductors and accurate layout parasitic estimates since the early stages of design process.
