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Performance of a VDFLL GNSS Receiver Architecture in Presence of Interference

Sousa, F. ; Nunes, F.

Performance of a VDFLL GNSS Receiver Architecture in Presence of Interference, Proc ESA Workshop on Satellite Navigation User Equipment Technologies (NAVITEC), Noordwijk, Netherlands, Vol. 1, pp. 1 - 8, December, 2016.

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Abstract
We discuss the advantages of using a vector delay/frequency-locked loop (VDFLL) architecture for GNSS receivers operating in scenarios disturbed by radio-frequency interference. Narrowband (sinusoidal) and wideband (chirp) interference signals are considered in the analysis. The VDFLL is constituted by a bank of code and frequency discriminators feeding a central extended Kalman filter that estimates the receiver's position, velocity, and clock bias. Simulation results are obtained using sine-phase binary offset carrier BOCs(1,1) modulation. The results are compared with the theoretical performance determined by the effective signal power to noise density ratio.