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A Monolithic Low-Power 5.2GHz Digitally Linearized VGA

Azevedo, F. ; Fialho, V. ; Fortes, F. ; Rosário, M.

A Monolithic Low-Power 5.2GHz Digitally Linearized VGA, Proc Conf. on Electronics, Telecommunications and Computers - CETC, Lisbon, Portugal, Vol. 17, pp. 650 - 657, December, 2013.

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This paper presents the design and simulation of a 5GHz monolithic linearized Digitally Controlled Voltage Gain Amplifier. Intended to be integrated with a receiver monolithic front-end die, the fully integrated circuit was implemented in a 0.18m CMOS technology. The digital circuit comprises an internal six bit DAC and a four bit input logic control, allowing a response gain of sixteen linearized levels. The simulations, optimized to noise performance, linearity, dynamic gain and minimum differential phase and magnitude error, were performed with BSIM3 model. Circuit simulations present 16dB dynamic differential gain variation at 5.2GHz, a phase and a transducer gain magnitude errors less than 7º and 0.1dB, respectively, in a 100MHz span around 5.2GHz, NF=5dB, 1dBCP = -22dBm, IIP3 = -10dBm, 50 input and output match, while drawing 7mA from a 1.8V power supply.