Characterization and Performance Analysis of a VDFLL GNSS Receiver Architecture
Characterization and Performance Analysis of a VDFLL GNSS Receiver Architecture, Proc ESA Workshop on Satellite Navigation User Equipment Technologies (NAVITEC), Noordwijk, Netherlands, Vol. 1, pp. 1 - 8, December, 2012.
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A non-coherent vector delay/frequency-locked loop
architecture for GNSS receivers is proposed. Two dynamics
models are considered: PV (position and velocity) and PVA
(position, velocity, and acceleration). In contrast with other
vector architectures, the proposed approach does not require
the estimation of signals amplitudes. Only coarse estimates of
the carrier-to-noise ratios are necessary.