The presence of phase noise in the signal generator used to characterize analog-to-digital converters (ADCs) affects the precision of the estimates made. This work focuses specifically on estimating the transition voltages of ADCs made with the Histogram Test Method. A mathematical relationship between phase noise standard deviation and the standard deviation of the transition voltage estimates made is derived. This empowers test engineers to choose the proper test parameters to achieve a desired bound on the precision of the estimations thus guaranteeing a certain confidence interval width and optimizing the test duration. The results obtained are verified through numerical simulations using a Monte Carlo type procedure.