Creating and sharing knowledge for telecommunications

Research Position:

Title: Research Grant – BIM – Nº 029/2019- PTDC/EEI-HAC/30485/2017 - Sistema de Processamento Dedicado para Aprendizagem Profunda
Funding Reference Number: Research Grant – BIM – Nº 029/2019- PTDC/EEI-HAC/30485/2017
Summary: A research position for one Research Grant (“Bolsa de Investigação“) is opened at Instituto de Telecomunicações, in the scope of the Project HAnDLE, funded by Fundação para a Ciência e a Tecnologia (FCT). The work for this position is in the area of Computer Architectures.
Scientific Area: Networks and Multimedia
Group: Multimedia Signal Processing – Co
Admission Requirements: • M.Sc. in Electrical and Computer Engineering with a dissertation in Computer Architecture. • Familiarity with CUDA, OpenCL, OpenACC, C and C++ programming languages and frameworks, and previous experience in parallel programming. • Knowledge about VHDL and Verilog and experience programming Xilinx FPGAs. • Experience and self-motivation for scientific research and ability for teamwork. • Experience in writing scientific texts (scientific articles, book chapters, etc.).
Work Objectives: Development of parallel kernels at the software and hardware stack levels, for accelerating the processing of convolutions for image signal processing and machine learning applications, and sparse matrix processing for signal processing communications problems. The main tasks of the scholarship will be: • Development of a set of application benchmarks for signal processing and machine learning. The benchmarks will be implemented and tested on GPU-accelerated systems. • Evaluation of the sensibility of the benchmarks accuracy when varying the approximation degree and numerical precision. • Development of scalable processing cores for variable approximation and numeric precision levels. Correspondingly core validation and implementation on GPUs and FPGAs. Study of the area requirements for integration in a reconfigurable system. • Both gate-level and system-level simulators shall be used to ensure not only the correctness of the internal operation of each individual block of the architecture, but also to validate the external interconnection (data and control) of the several modules. • State-of-the-art low-power GPUs and later an FPGA devices, integrated in commercial development boards, will be used to prototype the conceived architecture. These development boards will be connected to the host CPU, thus providing a complete accelerator environment that will be used in the evaluation task.
Applicable legislation: A fellowship will be celebrated according to the regulations defined by FCT, “Regulation of Instituto de Telecomunicações’ fellowships” and ” Estatuto do Bolseiro de Investigação”, according to Law no. 40/2004, dated August 18 (Status of Scientific Research Fellow), as amended and republished by Decree-Law No.202/2012 of August 27, and as amended by Decree-Law No.233/2012 of October 29 and by Law No.12/2013 of January 29, and Decree-Law No. 89/2013 of July 9, and also by Fundação para Ciência e Tecnologia, I.P. Fellowship Regulation of Fundação para Ciência e Tecnologia, I.P., approved by Regulation no. 234/2012, published in Series II of Diário da República of June 25 of 2012, amended and republished by Regulation no. 326/2013, published in Series II of Diário da República of July 27 of 2013 and amended by Regulation no. 339/2015, published in Series II of Diário da República of June 17 of 2015, and amended by Regulation nº137-A/2018, published in Series II of Diário da República of February 27 of 2018.
Place of work: The work will be developed at the premises of Instituto de Telecomunicações at Coimbra, under the supervision of Professor Gabriel Falcão Paiva Fernandes.
Duration: 12 months, with the possibility of renewal. Start date: 15th of November 2019 (or soon thereafter).
Monthly salary: 989,70 € (net), according to the table of grant amounts awarded directly by FCT for positions held in Portugal ( The payment will be made by bank transfer.
Selection criteria:
Curriculum vitae/Academic evaluation  (40%)
Suitability of the candidates’ profile to the project based on the relevant work experience in the tasks described in the work plan  (50%)
Fluency in oral and written English  (10%)
The Jury has the right to not admit any of the candidates that applied for this position.
Gabriel Falcão Paiva Fernandes
Fernando Manuel Santos Perdigão
Marco Alexandre Cravo Gomes
Communication of the results: Results will be published at the Instituto de Telecomunicações, in Coimbra. The selected candidate will be notified by email.
Required Documents: Cover letter explaining the interest in the position, detailed Curriculum Vitae with transcripts, Copy of the relevant certificates (Copy of the Degree Certificate). IMPORTANT NOTICE: If the selected candidate has a degree obtained outside Portugal, his/her degree must be certified in Portugal For more information see: Direcção-Geral do Ensino Superior (DGES):
Application Period: 17-10-2019 to 31-10-2019
Assistance: Send Email
Published on: 04-10-2019