J. Andrade,
G. Falcão,
V. Silva,
S. Yamagiwa,
L. Sousa,
Accelerating Conventional Processing Using GPU Clusters: LDPC Decoders,
Chapter in,
Encyclopedia of Computer Science and Technology,
Phillip A. Laplante, Editor-in-Chief, Engineering Division,
Taylor & Francis,
Pennsylvania State University, Malvern, Pennsylvania, U.S.A.,
2016
Ó. Ferraz,
S. Subramaniyan,
R. Chinthalaa,,
J. Andrade,
J. R. C. Cavallaro,
S. Nandy,
V. Silva,
X. Zhang,
M. P. Purnaprajna,
G. Falcão,
A Survey on High-Throughput Non-Binary LDPC Decoders: ASIC, FPGA and GPU Architectures,
IEEE Communications Surveys and Tutorials,
Vol. 1,
No. 1,
pp. 1 - 33,
November,
2021
| Full text (PDF 8 MBs)
| BibTex
J. Andrade,
N. George,
K. Karras,
D. N. Novo,
F. P. Pratas,
L. Sousa,
P. I. Ienne,
G. Falcão,
V. Silva,
Design Space Exploration of LDPC Decoders using High-Level Synthesis,
IEEE Access,
Vol. 1,
No. 1,
pp. 1 - 1,
July,
2017
| BibTex
N. Vicente,
G. Falcão,
V. Silva,
J. Andrade,
Mobile 4K / 2K / HD video streaming supported by real-time FEC RaptorQ codes,
IEEE Transactions on Consumer Electronics,
Vol. 62,
No. 4,
pp. 405 - 411,
November,
2016,
| Abstract
| BibTex
M- O. Owaida,
G. Falcão,
J. Andrade,
C. D. A. Antonopoulos,
N. B. Bellas,
M. P. Purnaprajna,
D. N. Novo,
G. K. Karakonstantis,
A. B. Burg,
P. I. Ienne,
Enhancing design space exploration by extending CPU/GPU specifications onto FPGAs,
Transactions on Embedded Computing Systems,
Vol. 14,
No. 2,
pp. 1 - 23,
March,
2015,
| Abstract
| BibTex
J. Andrade,
G. Falcão,
V. Silva,
Flexible design of wide-pipeline based WiMAX QC-LDPC decoder architectures on FPGAs using high-level synthesis,
Measurement: Journal of the International Measurement Confederation,
Vol. 50,
No. 11,
pp. 839 - 840,
May,
2014
| BibTex
G. Falcão,
J. Andrade,
V. Silva,
L. Sousa,
GPU-based DVB-S2 LDPC decoder with high throughput and fast error floor detection,
Measurement: Journal of the International Measurement Confederation,
Vol. 47,
No. 9,
pp. 542 - 543,
April,
2011
| BibTex
JM Marques,
J. Andrade,
G. Falcão,
Unreliable Memory Operation on a Convolutional Neural Network Processor,
IEEE International Workshop on Signal Processing Systems - SiPS,
Lorient,
France,
October,
2017
| BibTex
JM Mu,
A. V. Vosougui,
G. Falcão,
J. Andrade,
ABS Balatsoukas-Stimming,
G. K. Karakonstantis,
A. B. Burg,
V. Silva,
J. R. C. Cavallaro,
The Impact of Faulty Memory Bit Cells on the Decoding of Spatially-Coupled LDPC Codes,
Asilomar Conf. on Signals, Systems, and Computers,
Pacific Grove,
United States,
Vol. 1,
pp. 1 - 10,
November,
2015
| BibTex
J. Andrade,
N. George,
K. Karras,
D. N. Novo,
V. Silva,
P. I. Ienne,
G. Falcão,
From Low-architectural Expertise Up to High-throughput Non-binary LDPC Decoders: Optimization Guidelines using High-level Synthesis,
International Conf. on Field Programmable Logic and Applications - FPL,
London,
United Kingdom,
Vol. 1,
pp. 1 - 8,
September,
2015,
| Abstract
| BibTex
J. Andrade,
N. George,
K. Karras,
D. N. Novo,
V. Silva,
P. I. Ienne,
G. Falcão,
Fast Design Space Exploration using Vivado HLS: Non-Binary LDPC Decoders,
IEEE International Symp. on Field-Programmable Custom Computing Machines - FCCM,
Vancouver,
Canada,
Vol. *,
pp. * - *,
May,
2015,
| Abstract
| BibTex
J. Andrade,
G. Falcão,
V. Silva,
Accelerating and Decelerating Min-Sum-based Gear-Shift LDPC Decoders,
IEEE International Conf. on Acoustics, Speech, and Signal Processing - ICASSP,
Brisbane,
Australia,
Vol. 1,
pp. 1 - 4,
April,
2015
| BibTex
R. R. Ralha,
G. Falcão,
J. Andrade,
M. A. Antunes,
J. P. B. Barreto,
U. Nunes,
Distributed Demse Stereo Matching for 3D Reconstruction Using Parallel-based Processing Advantages,
IEEE International Conf. on Acoustics, Speech, and Signal Processing - ICASSP,
Brisbane,
Australia,
Vol. 1,
pp. 1 - 5,
April,
2015
| BibTex
J. Andrade,
A. V. Vosougui,
G. W. Wang,
G. K. Karakonstantis,
A. B. Burg,
G. Falcão,
V. Silva,
J. R. C. Cavallaro,
On the Performance of LDPC and Turbo Decoder Architectures with Unreliable Memories,
Asilomar Conf. on Signals, Systems, and Computers,
Pacific,
United States,
Vol. 1,
pp. 1 - 1,
November,
2014,
| Abstract
| BibTex
J. Andrade,
F. P. Pratas,
G. Falcão,
V. Silva,
L. Sousa,
Combining Flexibility with Low Power: Dataflow and Widepipeline LDPC Decoding Engines in the Gbit/s Era,
IEEE International Conf. on Application-specific Systems, Architectures and Processors - ASAP,
Zurich,
Switzerland,
Vol.,
pp. 264 - 269,
June,
2014
| BibTex
J. Andrade,
G. Falcão,
V. Silva,
K. Kasai,
Flexible Non-Binary LDPC Decoding on FPGAs,
IEEE International Conf. on Acoustics, Speech, and Signal Processing - ICASSP,
Firenze,
Italy,
Vol.,
pp. 1936 - 1940,
May,
2014
| BibTex
A. A. Santos A. Santos,
J. Andrade,
Stochastic Volatility Estimation with GPU Computing,
Conf. on Indirect Estimation Methods in Finance and Economics,
Allensbach,
Germany,
Vol. 1,
pp. 1 - 1,
May,
2014
| BibTex
F. P. Pratas,
J. Andrade,
G. Falcão,
V. Silva,
L. Sousa,
Open the Gates: Using High-level Synthesis Towards Programmable LDPC Decoders on FPGAs,
IEEE Global Conf. on Signal and Information Processing - Global SIP,
Austin, Texas,
United States,
Vol. 1,
pp. 1274 - 1277,
December,
2013
| Full text (PDF 664 KBs)
| BibTex
G. Falcão,
J. Andrade,
V. Silva,
S. Yamagiwa,
L. Sousa,
Stressing the BER simulation of LDPC codes in the error floor region using GPU clusters,
IEEE International Symp. on Wireless Communication Systems - ISWCS,
Ilmenau,
Germany,
Vol. 1,
pp. 1 - 5,
August,
2013
| BibTex
J. Andrade,
G. Falcão,
V. Silva,
Structuring Irregular Binary LDPC Decoding on Graphics Processors,
Conf. on Telecommunications - ConfTele,
Castelo Branco,
Portugal,
Vol. 1,
pp. 1 - 4,
May,
2013
| BibTex
J. Andrade,
G. Falcão,
V. Silva,
M- O. Owaida,
C. D. A. Antonopoulos,
N. B. Bellas,
P. I. Ienne,
Towards High-Throughput with Low-Effort Programming: From General-Purpose Manycores to Dedicated Circuits,
Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications Workshop - DATE - DEPCP,
Grenoble,
France,
Vol. 1,
pp. 1 - 1,
March,
2013
| BibTex
J. Andrade,
G. Falcão,
V. Silva,
Memory-Hierarchy-Aware Decoding of Structured LDPC Codes on GPUs,
Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems - ACACES,
Fiuggi,
Italy,
Vol. 1,
pp. 219 - 222,
July,
2011,
| Abstract
| BibTex
G. Falcão,
J. Andrade,
V. Silva,
L. Sousa,
REAL-TIME DVB-S2 LDPC DECODING ON MANY-CORE GPU ACCELERATORS,
IEEE International Conf. on Acoustics, Speech, and Signal Processing - ICASSP,
Prague,
Czech Republic,
May,
2011
| BibTex
G. Falcão,
V. Silva,
J. Andrade,
ALTERA Europe-wide University Contest 2012-2013,
''ALTERA Europe-wide University Contest 2012-2013'', category of ''Most commercially relevant use of an FPGA'' for ON-OFF: Opencl-based NOn-binary ldpc decoding For FPGAs'', by João Andrade, Gabriel Falcão, and Vítor Silva. The award was received at the International Conference on Field Programmable Logic and Applications (FPL), in September 2nd 2013.,
01-09-2013
