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IT Member Profile

... Filipe Parrado de Azevedo

PhD Student

Filipe Azevedo

Academic position: PhD Student
Joining date: 01-01-2024
Roles in IT: PhD Student
Thematic Line: Basic Sciences and Enabling Technologies
Group: Integrated Circuits - Lx

Email: Send Email
Address: IT – Lisboa
Instituto Superior Técnico - Torre Norte - Piso 10
Av. Rovisco Pais, 1
1049 - 001 Lisboa
Tel: +351 21 841 84 54
Fax: +351 21 841 84 72

CienciaID
http://www.cienciavitae.pt/7B11-1614-A9B6

Scientific Achievements

  • Generative AI Solutions for Analog Integrated Circuits Design, Instituto Superior Técnico, PhD Student, Filipe Parrado de Azevedo, Supervisor: R. M. Martins, jan-2024 - dez-2026
1Books
  • P. E. Eid, F. A. Azevedo, N. Lourenço, R. M. Martins, Efficient Analog Integrated Circuit Sizing with GenAI: Exploring Generative Diffusion Models, Springer, Cham, Cham, 2025,
    | BibTex
1Papers in Journals
  • P. E. Eid, F. A. Azevedo, N. Lourenço, R. M. Martins, Using denoising diffusion probabilistic models to solve the inverse sizing problem of analog integrated circuits, AEU - International Journal of Electronics and Communications, Vol., No., pp. 155767 - 155767, March, 2025 | BibTex
4Papers in Conferences
  • F. A. Azevedo, M. L. Leibl, R. M. Martins, H. G. Graeb, Inverse Analog IC Sizing and Exploration through Diffusion Models and Structural Knowledge, International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Istanbul, Turkey, Vol., pp. -, July, 2025 | Full text (PDF 511 KBs) | BibTex
  • F. A. Azevedo, N. Lourenço, R. M. Martins, Late Breaking Results: Encoder-Decoder Generative Diffusion Transformer Towards Push-Button Analog IC Sizing, ACM/IEEE Design Automation Conference (DAC), San Francisco, United States, Vol., pp. -, June, 2025,
    | Abstract     | BibTex
  • P. E, Eid, F. A. Azevedo, R. M. Martins, N. Lourenço, Solving the Inverse Problem of Analog Integrated Circuit Sizing with Diffusion Models, IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Volos, Greece, Vol., pp. -, July, 2024,
    | Abstract     | BibTex
  • D. P. Peneda, F. A. Azevedo, N. Lourenço, N. Horta, R. M. Martins, Effective Routing Probability Maps via Convolutional Neural Networks for Analog IC Layout Automation, International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Volos, Greece, Vol., pp. -, July, 2024,
    | Abstract     | BibTex

Currently running projects1

Acronym Name Funding Agency Start date Ending date
ACTON Accelerating the Future 5G/6G Deployments with Millimeter Wave Integrated Circuit Interfaces Generated by Deep Computer Vision FCT 01-02-2024 31-07-2026

Activities from this researcher fall under the following United Nations Strategic Development Goals (SDGs):

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