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Creating and sharing knowledge in communications and information technology
... Filipe Parrado de Azevedo

PhD Student

Filipe Azevedo

Academic position: PhD Student
Joining date: 01-01-2024
Roles in IT: PhD Student
Thematic Line: Basic Sciences and Enabling Technologies
Group: Integrated Circuits - Lx
IT – Lisboa
Instituto Superior Técnico - Torre Norte - Piso 10
Av. Rovisco Pais, 1
1049 - 001 Lisboa
Tel: +351 21 841 84 54
Email: Send Email
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Collaboration Network

Scientific Achievements

  • Generative AI Solutions for Analog Integrated Circuits Design, Instituto Superior Técnico, PhD Student, Filipe Parrado de Azevedo, Supervisor: R. M. Martins, jan-2024 - dez-2026
1Books
2Papers in Journals
  • F. A. Azevedo, N. Lourenço, R. M. Martins, Comprehensive application of denoising diffusion probabilistic models towards the automation of analog integrated circuit sizing, Expert Systems with Applications, Vol. 290, No., pp. 128414 - 128414, September, 2025,
    | Abstract     | BibTex
  • P. E. Eid, F. A. Azevedo, N. Lourenço, R. M. Martins, Using Denoising Diffusion Probabilistic Models to solve the inverse sizing problem of analog Integrated Circuits, AEU - International Journal of Electronics and Communications, Vol. 195, No., pp. 155767 - 155767, May, 2025,
    | Abstract     | BibTex
9Papers in Conferences
  • F. A. Azevedo, D. M. Marques, C.A. Almeida, F. Passos, R. M. Martins, Generative Analog Integrated Circuit Placement via Denoising Diffusion Models, IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Dresden, Germany, Vol., pp. -, July, 2026 | Full text (PDF 632 KBs) | BibTex
  • H. Liu, F. A. Azevedo, C.A. Almeida, H. Taşkiran, E. Afacan, L. Jiao, R. M. Martins, Using Variational Autoencoders to Address the Inverse Sizing Design Problem of Analog ICs, IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Dresden, Germany, Vol., pp. -, July, 2026 | Full text (PDF 958 KBs) | BibTex
  • M. Moura Ramos, T. Almeida, D. Vareta, F. A. Azevedo, S. A. Agrawal, P. Fernandes, A. Martins, Fine-Grained Reward Optimization for Machine Translation using Error Severity Mappings, EACL: Conference of the European Chapter of the Association for Computational Linguistics EACL, Rabat, Morocco, March, 2026,
    | Abstract     | BibTex
  • P. P. Paiva, F. A. Azevedo, R. M. Martins, PVT-Inclusive mmWave IC Sizing Optimizations Boosted by ANN-based Performance Regressors and Transfer Learning, IEEE International Conference on Electronics Circuits and Systems - ICECS, Marrakech, Morocco, Vol., pp. -, November, 2025,
    | Abstract     | BibTex
  • F. A. Azevedo, M. L. Leibl, R. M. Martins, H. G. Graeb, Inverse Analog IC Sizing and Exploration through Diffusion Models and Structural Knowledge, International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Istanbul, Turkey, Vol., pp. -, July, 2025 | Full text (PDF 511 KBs) | BibTex
  • J. C. Costa, F. A. Azevedo, R. M. Martins, A Comparative Study on the Incorporation of PVT Corner Conditions within Reinforcement Learning-based Analog IC Sizing Approaches, IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Istanbul, Turkey, Vol., pp. -, July, 2025 | BibTex
  • F. A. Azevedo, N. Lourenço, R. M. Martins, Late Breaking Results: Encoder-Decoder Generative Diffusion Transformer Towards Push-Button Analog IC Sizing, ACM/IEEE Design Automation Conference (DAC), San Francisco, United States, Vol., pp. -, June, 2025,
    | Abstract     | BibTex
  • P. E, Eid, F. A. Azevedo, R. M. Martins, N. Lourenço, Solving the Inverse Problem of Analog Integrated Circuit Sizing with Diffusion Models, IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Volos, Greece, Vol., pp. -, July, 2024,
    | Abstract     | BibTex
  • D. P. Peneda, F. A. Azevedo, N. Lourenço, N. Horta, R. M. Martins, Effective Routing Probability Maps via Convolutional Neural Networks for Analog IC Layout Automation, International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Volos, Greece, Vol., pp. -, July, 2024,
    | Abstract     | BibTex

Currently running projects1

Acronym Name Funding Agency Start date Ending date
ACTON Accelerating the Future 5G/6G Deployments with Millimeter Wave Integrated Circuit Interfaces Generated by Deep Computer Vision FCT 01-02-2025 31-07-2026

Activities from this researcher fall under the following United Nations Strategic Development Goals (SDGs):

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