N. Lourenço,
R. M. Martins,
A. Canelas,
R. P. Póvoa,
N. Horta,
Best Paper Award 2019 - Integration, the VLSI Journal,
N. Lourenço, R. Martins, A. Canelas, R. Póvoa, and N. Horta, “AIDA: Layout-aware Analog Circuit-Level Sizing with In-Loop Layout Generation”, Integration, the VLSI Journal, 2016. DOI: 10.1016/j.vlsi.2016.04.009,
01-07-2019
D. Guerra,
N. Lourenço,
A. Canelas,
R. P. Póvoa,
N. Horta,
R. M. Martins,
Best Paper Award Runner-Up - International Conference on SMACD,
Daniel Guerra, António Canelas, Ricardo Póvoa, Nuno Horta, Nuno Lourenço and Ricardo Martins "Artificial Neural Networks as an Alternative for Automatic Analog IC Placement", International Conference on SMACD 2019, Switzerland.,
01-07-2019
J. Calvillo,
J.G. Guilherme,
N. Horta,
Silver Leaf Award,
Silver Leaf Award for Design of a BGR suitable for The Space Industry with Performance of 1.25 V with 0.758 ppm/°C TC from - 55° to 125°C in New Generation of Circuit and Systems Conference.,
01-09-2017
R. M. Martins,
A. Canelas,
N. Lourenço,
N. Horta,
Best Paper Award at International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD),
"On-the-fly exploration of placement templates for analog IC layout-aware sizing methodologies," , in International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Lisboa, Portugal, June 2016.,
01-06-2016
C. Silva,
J.G. Guilherme,
SCALES: A high speed simulator tool for pipeline A/D converters,
Proc. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Lisbon, Portugal, Jun. 2016. (SMACD 2016 - 1st Prize Awarded in the Analog IC Design Automation Competition),
01-06-2016
R. M. Martins,
N. Lourenço,
A. Canelas,
R. P. Póvoa,
N. Horta,
1st Ranked on “Design Automation Competition” at International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD),
"AIDA: Robust Layout-Aware Synthesis of Analog ICs including Sizing and Layout Generation" at International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Istanbul, Turkey.,
01-09-2015
R. M. Martins,
N. Lourenço,
N. Horta,
Silver Leaf Best Paper Award at IEEE Conference on PhD Research in Microelectronics and Electronics (PRIME),
“Analog IC Placement using Absolute Coordinates and a Hierarchical Combination of Pareto Optimal Fronts”, in IEEE Conference on PhD Research in Microelectronics and Electronics (PRIME), Glasgow, Scotland, June 2015.,
01-07-2015
R. P. Póvoa,
N. Lourenço,
N. Horta,
JG Goes,
Nominee for Best Student Paper Award at IEEE International Symp. on Circuits and Systems (ISCAS),
A Voltage-Combiners-Biased Amplifier with Enhanced Gain and Speed using Current Starving, Lisboa, Portugal.,
01-05-2015
R. P. Póvoa,
R. Lourenço Lourenço,
N. Lourenço,
A. Canelas,
R. M. Martins,
N. Horta,
Best Student Paper Award Runner-Up at IEEE International Symp. on Circuits and Systems (ISCAS),
LC-VCO Automatic Synthesis Using Multi-Objective Evolutionary Techniques, Melbourne, Australia.,
01-06-2014
R. M. Martins,
N. Lourenço,
S. R. Rodrigues,
J.G. Guilherme,
N. Horta,
Honourable Mention on “Design Automation Competition” at International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD),
“AIDA: Automated Analog IC Design Flow from Circuit Level to Layout”, in International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Seville, Spain, Sep. 2012.,
01-09-2012
DG Guilherme,
J.G. Guilherme,
N. Horta,
Best Student Paper Award,
The International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design - SM2ACD 2010 - best student paper award for the paper entitled ''Automatic Topology Selection and Sizing of Class-D Loop-Filters for Minimizing Distortion'',
01-10-2010
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