Academic position:
Assistant Professor
Joining date:
01-01-1993
Role in IT: Researcher Scientific Area: Basic Sciences and Enabling Technologies
Group: Integrated Circuits - Lx
Degrees
- PhD, Instituto Superior Técnico, 24-07-1997 - MSc, Instituto Superior Técnico, 30-11-1992 - Licenciatura, Instituto Superior Técnico, 31-07-1989
Expertise Topics
- Analog IC Design Automation - Design Optimization - Evolutionary Computation - Computational Finance
Affiliations
- ACM - Association for Computing Machinery, ACM Member, 01-11-2004
- Instituto Superior Técnico - Departamento de Engenharia Electrotecnica e de Computadores, Professor, 01-03-1998
- IEEE - Institute of Electrical and Electronics Engineers, IEEE Senior Member, 01-01-1991
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Multi-Objective Optimization Using Evolutionary, Instituto Superior Técnico, PhD Program in Electrical and Computer Engineering
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Analog IC Design Automation, Instituto Superior Técnico, PhD Program in Electrical and Computer Engineering
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Computer Architecture, Instituto Superior Técnico, Integrated Master Degree (MSc) in Electrical and Computer Engineering
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Digital Systems, Instituto Superior Técnico, Integrated Master Degree (MSc) in Electrical and Computer Engineering
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Advanced Computer Architectures, Instituto Superior Técnico, Integrated Master Degree (MSc) in Electrical and Computer Engineering
Supervision of theses
PhD
- Analog IC Design Automation in Deep Nanometer Technologies, PhD, Ricardo Martins , 1-2016, Instituto Superior Técnico
- Layout-Aware Analog IC Sizing in Deep Nanometer Technologies, PhD, Nuno Lourenço , 4-2014, Instituto Superior Técnico
- Amplificadores de Elevado Desempenho para Áudio, Amplicadores de Elevado Desempenho para Áudio, PhD, David Guilherme , 12-2013, Instituto Superior Técnico
- Arquitecturas Reconfiguráveis de Elevado Desempenho p/ Terminais Móveis da 4G e 5G, PhD, Mauro Santos , 12-2013
- Síntese e Optimização Automática de Circuitos e Sistemas Baseada em Técnicas de Computação Evolutiva, PhD, Manuel Barros , 5-2009
MSc
- GENOM2: Optimização do Dimensionamento de Circuitos Analógicos com Recurso a Técnicas de Computação Evolutiva , MSc, Marcio Cabral , 10-2013, Instituto Superior Técnico
- SPACE-DC/DC - II: Conversor DC-DC para a Industria Aeroespacial , MSc, Andre Martins Ribeiro , 10-2013, Instituto Superior Técnico
- STOCKS: Optimização Multi-Objectivo de Portfólios de Activos Financeiros, MSc, António Pinto, 10-2013, Instituto Superior Técnico
- Enhancing a Layout-Aware Synthesis Methodology for Analog ICs by Embedding Statistical Knowledge into the Evolutionary Optimization Kernel, MSc, Frederico Rocha , 12-2012, Instituto Superior Técnico
- AIDA II: OpAmps Automatic Layout Generator , MSc, Ricardo Martins, 4-2012, Instituto Superior Técnico
- AUDIO II: Amplificador Hi-Fi para Audio Portátil de Elevada Eficiência , MSc, João Silva Carvalho , 11-2011, Instituto Superior Técnico
- Space DCDC - III, MSc, Gonçalo Aguiar , 11-2011, Instituto Superior Técnico
- EVOLUTION - IC Design Automation, MSc, Carla Duarte , 4-2011, Instituto Superior Técnico
- Amplificador Hi-Fi para Audio Portátil de Elevada Eficiência, MSc, Frederico Cadete , 3-2011, Instituto Superior Técnico
- Space DCDC - II, MSc, Bruno Miguel Tavares Silva , 3-2011, Instituto Superior Técnico
- STOCKS: Computação Inteligente aplicada à Gestão de Portefólios de Acções, MSc, Adriano Simões , 12-2010, Instituto Superior Técnico
- MFUNDS: Computação Inteligente aplicada à Gestão de Fundos de Investimento, MSc, António Gorgulho, 11-2009, Instituto Superior Técnico
- Modelação Inteligente de Circuitos e Sistemas Integrados Analógicos com Recurso a Sistemas Difusos, MSc, Pedro Sousa , 10-2009, Instituto Superior Técnico
- Conversores DC-DC para a Industria Aeroespacial - II, MSc, António Bañon , 5-2009, Instituto Superior Técnico
- COIN: Computação Inteligente aplicada à Gestão de Fundos de Investimento, MSc, Nuno Lopes , 10-2008, Instituto Superior Técnico
- Conversores DC-DC para a Industria Aeroespacial - I, MSc, Carlos Pires, 10-2008, Instituto Superior Técnico
- LAYGEN: Gerador de Layout com Recurso a Técnicas de Computação Evolutiva, MSc, Nuno Lourenço , 11-2007
- Conversores A/D Reconfiguráveis para a 4G de Sistemas de Telecomunicações, MSc, Artur Silva , 10-2007
- AIDA - Automação do Fluxo de Projecto de Circuitos Integrados Analógicos, MSc, Gonçalo Neves , 7-2006
- Sistema para Gestão Inteligente de Informação numa Plataforma de E-Learning com Recurso a Técnicas de Data Mining, MSc, Rui Luís , 1-2006
- Sistema para Gestão Inteligente de Conteúdos numa Plataforma de E-Learning, MSc, David Simões , 7-2005
- Semantic Service Discovery on Smart Home Environments, MSc, José Iria , 2-2004
Licenciatura
- EVOLUTION: Optimização Automática de Circuitos e Sistemas Integrados, Licenciatura, Filipe Alves , 12-2006
- WEBCONF II: Sistema de Gestão e Organização de Conferências na WWW, Licenciatura, Luís Mendes , 12-2006
- LAYGEN II: Gerador de Layout com Recurso a Técnicas de Computação Evolutiva, Licenciatura, Michele Vianello, 7-2006
- Modelação e Projecto de Circuitos numa Tecnologia de Polímeros, Licenciatura, Samuel Pinto, Vitor Pelado , 7-2006
- PEDIAGNOSIS - Sistema de Diagnóstico para o Domínio da Pediatria, Licenciatura, Nuno Cordeiro, Ricardo Cristino , 7-2006
- VIANET III: Editor HTML/Javascript de Conteúdos Normalizados para Ambientes de E-Learning , Licenciatura, Ana Coelho, Rui Dias , 7-2006
- VIANET II: Sistema de Gestão de Avaliações Online num Ambiente de E-Learning, Licenciatura, Tiago Oliveira, Vasco Justino , 3-2006
- VIANET II: Plataforma de E-Learning para Ensino à Distância, Licenciatura, Miguel Domingos , 10-2005
- VIANET II: Sistema de Monitorização e Recomendação para um Ambiente de E-Learning, Licenciatura, João Figueiredo, Pedro Silva , 10-2005
- VIDEO Chat para Aula Virtual num Ambiente de E-Learning, Licenciatura, Daniel Gomes, Ruben Marinho , 10-2005
- VIANET II: Editor HTML/Javascript de Conteúdos Normalizados para Ambientes de E-Learning, Licenciatura, Francisco Raposo, Mário Espinheira , 10-2005
- Lourenço, N.; R. Martins; Barros , M.B.; Horta, N.H.; "Analog Circuit Design based on Robust POFs using an Enhanced MOEA with SVM Models" - Chapter in Analog/RF and Mixed-Signal Circuit Systematic Design, Mourad Fakhfakh, Esteban Tlelo-Cuautle, Rafael Castro-Lopez, Springer, ,
2013.
- Mauro, M.; Horta, N.H.; "AMS Synthesis Using Symbolic Methods" - Chapter in Design of Analog Circuits through Symbolic Analysis, Mourad Fakhfakh, Esteban Tlelo-Cuautle, Francisco V. Fernández, Bentham Science Publishers, ,
2012.
- Horta, N.H.; Leme, C.A.; J.E. Franca; "Automated High Level Synthesis of Data Conversion Systems" - Chapter in ANALOGUE-DIGITAL ASICs circuit techniques, design tools and applications, IEE - Peter Peregrinus , IEE Press, ,
1991.
Papers in Journals [8]
- A. Canelas; Neves, R.; Horta, N.H.; "A SAX-GA Approach to Evolve Investment Strategies on Financial Markets based on Pattern Discovery Techniques", Expert Systems with Applications, Vol. , No. , pp. - , January, 2013. Abstract
| BibTex
- Guilherme, DG; Guilherme, J.G.; Horta, N.H.; "Automatic Topology Selection and Sizing of Class-D Loop-Filters for Minimizing Distortion Based on an Evolutionary Optimization Kernel ", Analog Integrated Circuits and Signal Processing, Vol. 73, No. 10.1007/s10470-011-9716-4, pp. 21 - 32, October, 2012. Abstract
| BibTex
- A. Gorgulho Gorgulho; Neves, R.; Horta, N.H.; "Applying a GA kernel on optimizing technical analysis rules for stock picking and portfolio composition", Expert Systems with Applications, Vol. 38, No. 11, pp. 14072 - 14085 , October, 2011. Abstract
| BibTex
- R. Gama; Goes, J.; Neves, R.; Horta, N.H.; "Low-Power Open Loop Multiply-by-two Amplifier with Gain-accuracy Improved by Local-Feedback", Intrnl. Journal of Microelectronics and Computer Science, Vol. 1, No. 1, pp. 19 - 24, June, 2010.
| BibTex
- Barros , M.B.; Guilherme, J.G.; Horta, N.H.; "Analog Circuits Optimization based on Evolutionary Computation Techniques", Integration, The VLSI Journal, Vol. 43, No. 1, pp. 136 - 155, January, 2010. Abstract
| BibTex
- A. Silva; Guilherme, J.G.; Horta, N.H.; "Reconfigurable multi-mode sigma–delta modulator for 4G mobile terminals", Integration, The VLSI Journal, Vol. 42, No. 1, pp. 34 - 46, January, 2009. Abstract | Full text (PDF 1185KB) | BibTex
- Horta, N.H.; "Analogue and Mixed-Signal Systems Topologies Exploration using Symbolic Methods", Analog Integrated Circuits and Signal Processing, Vol. 31, No. 2, pp. - , February, 2002.
| BibTex
- Horta, N.H.; J.E. Franca; "Algorithm-Driven Synthesis of Data Conversion Architectures", IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, Vol. 16, No. 10, pp. 1116 - 1135, October, 1997.
| BibTex
Papers in Conference Proceedings [63]
- F.C. Cadete; Lourenço, N.; Barros , M.B.; Martins, R.; Horta, N.H.; "A New Metaheuristc Combining Gradient Models with NSGA-II to Enhance Analog IC Synthesis ", Proc IEEE Congress on Evolutionary Computation - CEC, Cancun, Mexico, Vol. , pp. - , June, 2013.
Abstract
| BibTex
- R. Martins; Lourenço, N.; A. Canelas; Horta, N.H.; "Multi-Port Multi-Terminal Analog Router based on an Evolutionary Optimization Kernel", Proc IEEE Congress on Evolutionary Computation - CEC, Cancun, Mexico, Vol. , pp. - , June, 2013.
Abstract
| BibTex
- F.C. Cadete; Martins, R.; Lourenço, N.; Horta, N.H.; "Enhancing a Layout-Aware Synthesis Methodology for Analog ICs by Embedding Statistical Knowledge into the Evolutionary Optimization Kernel", Proc Doctoral Conf. on Computing, Electrical and Industrial Systems - DOCEIS, Lisbon, Portugal, Vol. , pp. - , April, 2013.
Abstract
| BibTex
- N. Leite Leite; Neves, R.; Horta, N.H.; F. Melício Melício; A.C.R. Rosa; "Solving an Uncapacitated Exam Timetabling Problem Instance using a Hybrid NSGA-II", Proc International Conf. on Evolutionary Computation Theory and Applications - ECTA, Barcelona, Spain, Vol. , pp. - , October, 2012.
| BibTex
- R. Martins; Lourenço, N.; sr Rodrigues; Guilherme, J.G.; Horta, N.H.; "AIDA: Automated Analog IC Design Flow from Circuit Level to Layout", Proc International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Seville, Spain, Vol. , pp. - , September, 2012.
Abstract
| BibTex
- R. Martins; Lourenço, N.; Horta, N.H.; "Multi-Objective Multi-Constraint Routing of Analog ICs using a Modified NSGA-II Approach", Proc International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Seville, Spain, Vol. , pp. - , September, 2012.
Abstract
| BibTex
- Guilherme, J.G.; Horta, N.H.; "SCALES – A Behavioral Simulator for Pipelined Analog-to-Digital Converter Design", Proc International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Seville, Spain, Vol. 1, pp. 149 - 152, September, 2012.
Abstract
| BibTex
- A. Canelas; Neves, R.; Horta, N.H.; "A New SAX-GA Methodology applied to Investment Strategies Optimization", Proc Genetic and Evolutionary Computation Conf. - GECCO, Philadelphia, United States, Vol. , pp. - , July, 2012.
Abstract
| BibTex
- O. Y. Yefimochkin; Neves, R.; Horta, N.H.; "An Evolutionary Approach to Define Investment Strategies based on Macroeconomic Indicators and VIX Data", Proc Genetic and Evolutionary Computation Conf. - GECCO, Philadelphia, United States, Vol. , pp. - , July, 2012.
Abstract
| BibTex
- Pinto, J.; Horta, N.H.; "Automated Passive Filter Design Using Multi-objective Genetic Algorithms with Variable Parameters", Proc Genetic and Evolutionary Computation Conf. - GECCO, Philadelphia, United States, Vol. NA, pp. NA - NA, July, 2012. Abstract | Full text (PDF 356KB) | BibTex
- Lourenço, N.; Horta, N.H.; "GENOM-POF: Multi-Objective Evolutionary Synthesis of Analog ICs with Corners Validation", Proc Genetic and Evolutionary Computation Conf. - GECCO, Philadelphia, United States, Vol. , pp. 1119 - 1126, July, 2012.
Abstract
| BibTex
- R. Martins; Lourenço, N.; Horta, N.H.; "LAYGEN II: Automatic Analog ICs Layout Generator based on a Template Approach", Proc Genetic and Evolutionary Computation Conf. - GECCO, Philadelphia, United States, Vol. , pp. - , July, 2012.
Abstract
| BibTex
- F.C. Cadete; Guilherme, DG; Guilherme, J.G.; Horta, N.H.; F.C. Cadete; "Overcurrent Detection Circuit for Integrated Class-D Amplifiers", Proc European Conf. on Circuit Theory and Design, Linköping, Sweden, Vol. 1, pp. 410 - 413, September, 2011.
Abstract
| BibTex
- Pinto, J.; Neves, R.; Horta, N.H.; "Fitness Function Evaluation for MA Trading Strategies based on Genetic Algorithms ", Proc Genetic and Evolutionary Computation Conf. - GECCO, Dublin, Ireland, Vol. NA, pp. 819 - 820, July, 2011. Abstract | Full text (PDF 419KB) | BibTex
- P. Sousa; C. Duarte; Barros , M.B.; Guilherme, J.G.; Horta, N.H.; "Optimal OpAmp Sizing based on a Fuzzy-Genetic Kernel ", Proc Genetic and Evolutionary Computation Conf. - GECCO, Dublin, Ireland, Vol. , pp. - , July, 2011. Abstract | Full text (PDF 331KB) | BibTex
- P. Parracho Parracho; Neves, R.; Horta, N.H.; "Trading with Optimized Uptrend and Downtrend Pattern Templates using a Genetic Algorithm Kernel", Proc IEEE Congress on Evolutionary Computation - CEC, New Orleans, United States, Vol. , pp. - , June, 2011. Abstract | Full text (PDF 541KB) | BibTex
- A. Simões; Neves, R.; Horta, N.H.; "An Innovative GA Optimized Investment Strategy based on a New Technical Indicator using Multiple MAs ", Proc IJCCI International Conf. on Evolutionay Computation - ICEC , Valencia, Spain, Vol. 1, pp. 1 - 4, October, 2010. Abstract | Full text (PDF 149KB) | BibTex
- Guilherme, DG; Guilherme, J.G.; Horta, N.H.; "Automatic Topology Selection and Sizing of Class-D Loop-Filters for Minimizing Distortion", Proc International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design - SM2ACD , Gammarth, Tunisia, Vol. 1, pp. 1 - 4, October, 2010.
Abstract
| BibTex
- Guilherme, DG; Guilherme, J.G.; Horta, N.H.; "An Automated Design Methodology for Audio Class-D Loop-Filters Optimized for THD+N", Proc International Analog VLSI Workshop - AVLSIWS, Pavia, Italy, Vol. 1, pp. 47 - 51, September, 2010. Abstract | Full text (PDF 404KB) | BibTex
- P. Parracho Parracho; Neves, R.; Horta, N.H.; "Trading in Financial Markets using Pattern Recognition Optimized by Genetic Algorithms", Proc Genetic and Evolutionary Computation Conf. - GECCO, Portland, United States, Vol. 1, pp. 1 - 1, July, 2010.
Full text (PDF 268KB) | BibTex
- P. Sousa; C. Duarte; Guilherme, J.G.; Horta, N.H.; "Enhancing Analog IC Design Optimization Kernels with Simple Fuzzy Models", Proc European Conf. on Circuit Theory and Design, Antalya, Turkey, Vol. , pp. - , August, 2009. Abstract | Full text (PDF 340KB) | BibTex
- P. Sousa; C. Duarte; Horta, N.H.; "FUGA: A Fuzzy-Genetic Analog Circuit Optimization", Proc Genetic and Evolutionary Computation Conf. - GECCO, Montreal, Canada, Vol. , pp. - , July, 2009. Abstract | Full text (PDF 194KB) | BibTex
- A. Gorgulho Gorgulho; Neves, R.; Horta, N.H.; "Using GAs to Balance Technical Indicators on Stock", Proc Genetic and Evolutionary Computation Conf. - GECCO, Montreal, Canada, Vol. , pp. - , July, 2009.
Abstract
| BibTex
- R. Gama; Neves, R.; Horta, N.H.; "Design of a low-power, open loop, multiply-by-two amplifier with gain-accuracy improved by local-feedback", Proc International Conf. Mixed Design of Integrated Circuits and Systems - MIXDES, Lodz, Poland, Vol. 1, pp. 1 - 5, June, 2009.
Full text (PDF 162KB) | BibTex
- A. Ribeiro; T. Costa; R. Gama; Neves, R.; Horta, N.H.; "A bandgap Voltage Reference with Only CMOS Transistors", Proc Conf. on Telecommunications - ConfTele, Santa maria da Feira, Portugal, Vol. I, pp. 69 - 72, May, 2009.
Full text (PDF 125KB) | BibTex
- T. Costa; Neves, R.; Horta, N.H.; "Low-Area 4th-Order Shared-Amplfier Sigms-delta Modulator", Proc Conf. on Telecommunications - ConfTele, Santa maria da Feira, Portugal, Vol. I, pp. 65 - 68, May, 2009.
Full text (PDF 192KB) | BibTex
- Barros , M.B.; Guilherme, J.G.; Horta, N.H.; "Analog Circuits Optimization based on Evolutionary Computation Techniques", Proc Conf. on Telecommunications - ConfTele, Feira, Portugal, Vol. 1, pp. 1 - 1, April, 2009.
Abstract
| BibTex
- Guilherme, J.G.; Mauro, M.; Horta, N.H.; "Overview of Radiation Effects and Design Constraints off Fully Custom SMPS", Proc IEEE Asia Pacific Conf. on Circuits and Systems - APCCAS , Macau, China, Vol. 1, pp. 1 - 4, December, 2008.
Abstract
| BibTex
- Mauro, M.; Guilherme, J.G.; Horta, N.H.; "Overview of Radiation Effects and Design Constraints off Fully Custom SMPS", Proc IEEE Asia Pacific Conf. on Circuits and Systems - APCCAS , Macau, China, Vol. 1, pp. 372 - 375, December, 2008.
Abstract
| BibTex
- Horta, N.H.; Barros , M.B.; Guilherme, J.G.; "Analog Circuits and Systems Optimization based on Evolutionary Computation Techniques", Proc International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design - SM2ACD , Erfurt, Germany, Vol. , pp. - , October, 2008. Abstract | Full text (PDF 776KB) | BibTex
- P. Sousa; C. Duarte; Horta, N.H.; "Enhancing a GA Optimization Kernel based on Fuzzy Design Rules", Proc International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design - SM2ACD , Erfurt, Germany, Vol. , pp. - , October, 2008. Abstract | Full text (PDF 524KB) | BibTex
- M. Figueira; Guilherme, J.G.; Horta, N.H.; "Radiation Hardened SMPS", Proc International Workshop on Analog and Mixed-Signal Integrated Circuits for Space Applications - AMICSA, Sintra, Portugal, Vol. , pp. - , September, 2008.
| BibTex
- Mauro, M.; Guilherme, J.G.; Horta, N.H.; "Radiation Hardened SMPS, Power Converter and Integrated Circuit Design Controller", Proc International Workshop on Analog and Mixed-Signal Integrated Circuits for Space Applications - AMICSA, Cascais, Portugal, Vol. 1, pp. 1 - 8, August, 2008.
Abstract
| BibTex
- Guilherme, J.G.; Mauro, M.; Horta, N.H.; "Radiation Hardened SMPS, Power Converter and Integrated Circuit Design Controller", Proc International Workshop on Analog and Mixed-Signal Integrated Circuits for Space Applications - AMICSA, Cascais, Portugal, Vol. 1, pp. 1 - 1, August, 2008.
Abstract
| BibTex
- Horta, N.H.; Guilherme, J.G.; A. Silva; "A Reconfigurable A/D Converter for 4G Wireless", Proc IEEE International Symp. on Circuits and Systems - ISCAS, Seattle, United States, Vol. , pp. 924 - 927, May, 2008.
Abstract
| BibTex
- Horta, N.H.; Barros , M.B.; Guilherme, J.G.; "An Evolutionary Optimization Kernel Using a Dynamic GA-SVM Model Applied to Analog IC Design", Proc European Conf. on Circuit Theory and Design, , Spain, Vol. , pp. - , August, 2007.
| BibTex
- Horta, N.H.; A. Silva; Guilherme, J.G.; "Design of a Multimode Reconfigurable Sigma-Delta Converter for 4G Wireless Receivers", Proc European Conf. on Circuit Theory and Design, , Spain, Vol. , pp. - , August, 2007.
| BibTex
- Neves, R.; Guilherme, J.G.; Horta, N.H.; "Designing Reconfigurable Multi-Standard Analog Baseband Front-End for 4G Mobile Terminals: System Level Design", Proc Conf. on Telecommunications - ConfTele, Peniche, Portugal, Vol. I, pp. 1 - 4, May, 2007.
| BibTex
- Lourenço, N.; Horta, N.H.; "LAYGEN - Automatic Analog ICs Layout Generator", Proc Conf. on Telecommunications - ConfTele, Peniche, Portugal, Vol. 0, pp. 165 - 168, May, 2007.
Abstract
| BibTex
- Horta, N.H.; Barros , M.B.; Guilherme, J.G.; "GA-SVM Feasibility Model and Optimization Kernel applied to Analog IC Design Automation", Proc ACM Great Lakes VLSI - GLSVLSI), , Italy, Vol. , pp. - , March, 2007.
| BibTex
- Horta, N.H.; Charas, A.; Morgado, J.; "PLASTIC: Automatic Characterization and Modeling of Organic Transistors for IC Design and Simulation", Proc Conf. on Telecommunications - ConfTele, Peniche, Portugal, Vol. , pp. - , March, 2007.
| BibTex
- Horta, N.H.; G. Neves ; Barros , M.B.; "AIDA: Analog IC Design Automation based on a Fully Configurable Design Hierarchy and Flow", Proc IEEE International Conf. on Electronics, Circuits and Systems, , France, Vol. , pp. - , December, 2006.
| BibTex
- Horta, N.H.; Barros , M.B.; Guilherme, J.G.; "GA-SVM Optimization Kernel applied to Analog IC Design Automation", Proc IEEE International Conf. on Electronics, Circuits and Systems, , France, Vol. , pp. - , December, 2006.
| BibTex
- Lourenço, N.; M.V. Vianello; Guilherme, J.G.; Horta, N.H.; "LAYGEN - Automatic Layout Generation of Analog ICs from Hierarchical Template Descriptions", Proc IEEE PhD. Research in Microelectronics and Electronics - PRIME, Otranto, Italy, Vol. 0, pp. 213 - 216, June, 2006.
Abstract
| BibTex
- Lourenço, N.; Horta, N.H.; "LAYGEN – An Evolutionary approach to automatic analog IC Layout Generation", Proc IEEE Conf. on Electronics, Circuits and System, Gammarth, Tunisia, Vol. 1, pp. 1 - 2, December, 2005.
Abstract
| BibTex
- Horta, N.H.; Barros , M.B.; "An Evolutionary Optimization Kernel with Adaptive Parameters applied to Analog Circuit Design", Proc International Symp. on Signals, Circuits and Systems, Iasi, Romania, Vol. , pp. - , July, 2005.
| BibTex
- Horta, N.H.; G. Neves ; "Design Automation Methodology for Analog IC Design Matching Designers Approach", Proc International Symp. on Signals, Circuits and Systems, Iasi, Romania, Vol. , pp. - , July, 2005.
| BibTex
- Horta, N.H.; Barros , M.B.; "An Evolutionary Optimization Approach applied to Analog Circuit Design", Proc Conf. on Telecommunications - ConfTele, Tomar, Portugal, Vol. , pp. - , April, 2005.
| BibTex
- Horta, N.H.; "Analog and Mixed-Signal IC Design Automation: Synthesis and Optimization Overview", Proc Conf. on Telecommunications - ConfTele, Tomar, Portugal, Vol. , pp. - , April, 2005.
| BibTex
- Horta, N.H.; D. Simões ; "Evolving Standards in E-Learning: A Case-Study", Proc Conf. on Telecommunications - ConfTele, Tomar, Portugal, Vol. , pp. - , April, 2005.
| BibTex
- Horta, N.H.; Barros , M.B.; G. Neves ; Guilherme, J.G.; "A Distributed Enhanced Genetic Algorithm Kernel Applied to a Circuit/Level Optimization EDesign Environment", Proc Conf. on Design of Circuits and Integrated Systems, Bordeaux, France, Vol. , pp. - , November, 2004.
| BibTex
- Horta, N.H.; R. Luis; D. Simões ; "A Multi-Level Model for Tracking Analysis in E-Learning Platforms", Proc IEEE International Conf. on Advanced Learning Technologies, Helsinki, Finland, Vol. , pp. - , September, 2004.
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- Horta, N.H.; D. Simões ; R. Luis; "Enhancing the SCORM Modelling Scope", Proc IEEE International Conf. on Advanced Learning Technologies, Helsinki, Finland, Vol. , pp. - , September, 2004.
| BibTex
- Horta, N.H.; Redol , J.; R. Luis; D. Simões ; "Data Warehousing and Data Mining Applied to an E-Learning Platform", Proc International Conf. on Multimedia and ICTs in Education, Badajoz, Spain, Vol. , pp. - , December, 2003.
| BibTex
- Horta, N.H.; Barros , M.B.; J. Silva; G. Neves ; "Enhanced Genetic Algorithm Kernel Applied to a Circuit-Level Optimization E-Design Environment", Proc IEEE Conf. on Electronics, Circuits and System, Sharjah, United Arab Emirates, Vol. , pp. - , December, 2003.
| BibTex
- Horta, N.H.; D. Simões ; R. Luis; Redol , J.; "A New Approach Towards E-Learning Contents Standardization And Enhanced Usability", Proc IADIS International Conf. on WWW/Internet, Albufeira, Portugal, Vol. 1, pp. 1199 - 1103, November, 2003.
| BibTex
- Horta, N.H.; Redol , J.; D. Simões ; "VIANET-A New Web Framework for Distance Learning", Proc IEEE International Conf. on Advanced Learning Technologies, Athens, Greece, Vol. , pp. - , July, 2003.
| BibTex
- Neves, R.; Horta, N.H.; "Banner - Intelligent Management of Banner Advertisements on the WWW", Proc International Conf. on Data Mining, Florence, Italy, Vol. 1, pp. 11 - 15, September, 2002.
| BibTex
- Horta, N.H.; Iria, J.; "Towards a Framework for Semantic Service Discovery in Ubiquitous P2P Environment", Proc International Conf. on Internet Computing, Las Vegas, United States, Vol. , pp. - , June, 2002.
| BibTex
- J. Silva; Horta, N.H.; "E-Design Front-End for an IC optimizer based on a Genetic Algorithm ", Proc European Workshop on Microelectronics Education, Vigo, Spain, Vol. , pp. - , May, 2002.
| BibTex
- J. Silva; Horta, N.H.; "GENOM: Circuit-Level Optimizer Based on a Modified Genetic Algorithm Kernel", Proc IEEE International Symp. on Circuits and Systems - ISCAS, Phoenix, Arizona, United States, Vol. , pp. - , May, 2002.
| BibTex
- M. Fino; Horta, N.H.; "Symbolic Techniques Applied to Switched-Current ADCs Synthesis", Proc IEEE International Symp. on Circuits and Systems - ISCAS, Geneve, Switzerland, Vol. 1, pp. 1124 - 1127, May, 2000.
| BibTex
- Guilherme, J.G.; Horta, N.H.; "Symbolic Synthesis of Non-Linear Data Converters", Proc IEEE International Conf. on Electronics, Circuits and Systems, Lisbon, Portugal, Vol. 3, pp. 219 - 222, September, 1998.
| BibTex
Theses
- N.H. Horta; "Automatic Synthesis of Data Conversion Systems from Algorithm Descriptions", Instituto Superior Técnico, July, 1997 .
- N.H. Horta; "Automatic Synthesis of Charge Redistribution Data Conversion Systems", Instituto Suoerior Técnico, November, 1992 .
Other Scientific Achievements
Awards
- R. Martins; Lourenço, N.; sr Rodrigues; Guilherme, J.G.; Horta, N.H.;
"Honorable Mention from SMACD 2012 Competition on Analog IC Design Automation", “AIDA: Automated Analog IC Design Flow from Circuit Level to Layout”, Proceedings of International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) , Seville, Spain, Sep. 2012. , 01-10-2012.
- Guilherme, DG; Guilherme, J.G.; Horta, N.H.;
"Best Student Paper Award", The International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design - SM2ACD 2010 - best student paper award for the paper entitled ''Automatic Topology Selection and Sizing of Class-D Loop-Filters for Minimizing Distortion'', 01-10-2010.
Miscellaneous
- Horta, N.H.; "PhD Thesis Jury", "Behavioral Pattern Detection Using Compact and Fast Methods" by Nuno Homem", , 01-10-2011.
- Horta, N.H.; "PhD Thesis Jury", ''Time-Domain Optimizationof Amplifiers based on Distributed Geneti Algorothms'' by Rui Tavares", , 01-12-2010.
- Horta, N.H.; "PhD Thesis Jury", "Order Reduction of Parameterized Structured EM-based Linear Models" by Jorge Vilhena ", , 01-09-2010.
Other Contributions
Conference Committees
- IEEE International Symp. on Circuits and Systems - ISCAS, Organizing Committee, Nuno Cavaco Gomes Horta , 2015.
- International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Scientific Committee, Nuno Cavaco Gomes Horta , 2012.
- International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design - SM2ACD , Scientific Committee, Nuno Cavaco Gomes Horta , 2010.
- International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design - SM2ACD , Scientific Committee, Nuno Cavaco Gomes Horta , 2008.
- Design, Automation and Test in Europe Conf., Scientific Committee, Nuno Cavaco Gomes Horta , 2008.
- Design Automation and Test in Europe, DATE 2007, Technical Programme Committee, Nuno Cavaco Gomes Horta , 2007.
